ByteTrail

Level 4 · Module 21

Computer Architecture

A structured module covering the essential ideas of computer architecture.

Difficulty
intermediate
Published path
12 lessons · 120 min

What you will learn

  • CPU architecture
  • Registers
  • Instruction sets
  • ALU
  • Cache
  • RAM
  • Memory hierarchy
  • Assembly basics
  • Machine code
  • Interrupts
  • System calls
  • I/O
Prerequisites:Functional Programming

Start here

Lessons · 120 min

  1. CPU architecturePlanned

    Planned lesson: CPU architecture. This lesson has not been written yet.

    10 min · intermediate

  2. RegistersPlanned

    Planned lesson: Registers. This lesson has not been written yet.

    10 min · intermediate

  3. Instruction setsPlanned

    Planned lesson: Instruction sets. This lesson has not been written yet.

    10 min · intermediate

  4. ALUPlanned

    Planned lesson: ALU. This lesson has not been written yet.

    10 min · intermediate

  5. CachePlanned

    Planned lesson: Cache. This lesson has not been written yet.

    10 min · intermediate

  6. RAMPlanned

    Planned lesson: RAM. This lesson has not been written yet.

    10 min · intermediate

  7. Memory hierarchyPlanned

    Planned lesson: Memory hierarchy. This lesson has not been written yet.

    10 min · intermediate

  8. Assembly basicsPlanned

    Planned lesson: Assembly basics. This lesson has not been written yet.

    10 min · intermediate

  9. Machine codePlanned

    Planned lesson: Machine code. This lesson has not been written yet.

    10 min · intermediate

  10. InterruptsPlanned

    Planned lesson: Interrupts. This lesson has not been written yet.

    10 min · intermediate

  11. System callsPlanned

    Planned lesson: System calls. This lesson has not been written yet.

    10 min · intermediate

  12. I/OPlanned

    Planned lesson: I/O. This lesson has not been written yet.

    10 min · intermediate

What you will cover

Module units

  1. CPU architecture

    A planned unit covering CPU architecture.

  2. Registers

    A planned unit covering Registers.

  3. Instruction sets

    A planned unit covering Instruction sets.

  4. ALU

    A planned unit covering ALU.

  5. Cache

    A planned unit covering Cache.

  6. RAM

    A planned unit covering RAM.

  7. Memory hierarchy

    A planned unit covering Memory hierarchy.

  8. Assembly basics

    A planned unit covering Assembly basics.

  9. Machine code

    A planned unit covering Machine code.

  10. Interrupts

    A planned unit covering Interrupts.

  11. System calls

    A planned unit covering System calls.

  12. I/O

    A planned unit covering I/O.